量子电子学报, 2005, 22 (6): 923, 网络出版: 2006-06-12
GaAs/Si/AlAs异质结的DLTS实验研究
Study of GaAs/Si/AlAs by DLTS technique
光电子学 深能级瞬态谱 深能级缺陷 Si夹层 GaAs/AlAs异质结 optoelectronics deep level transient spectroscopy deep level defect Si interlayer GaAs/AlAs heterojunction
摘要
利用深能级瞬态谱(DLTS)技术研究了Si夹层和GaAs层不同生长温度对GaAs/AlAs异质结晶体品质的影响.发现Si夹层的引入并没有引起明显深能级缺陷,而不同温度下生长的GaAs/Si/AlAs异质结随着温度的降低,深能级缺陷明显增加,并进行了分析,得到深能级是由Ga空位引起的,在600℃时生长的晶体质量最佳.
Abstract
GaAs/AlAs heterojunction has been widely used in practice for various devices. Band offsets at semiconductor heterojunctions are fundamental parameters which govern the transport properties to miroelectronic devices. Recent theoretical and experimental results have focused attention on the thin Si interlayers at GaAs/AlAs heterojunctions in determining heterojunction band discontinuities. Both the presence of Si interlayer and GaAs at different growth temperature probably bring crystal defect into GaAs/Si/AlAs, which lead to bad quality of GaAs/Si/AlAs heterojunctions and influence the technical applications of heterojunctions in practice. GaAs/Si/AlAs heterojunctions prepared by MBE are examined. The influence of 0.5 ML Si interlayer and GaAs at different growth temperature on GaAs/AlAs are investigated by DLTS technique. The results reveal that the Si interlayer has little influence on the crystal, whereas the lower growth temperature for GaAs is, the more deep level defects occur in the crystal
李永平, 田强, 牛智川. GaAs/Si/AlAs异质结的DLTS实验研究[J]. 量子电子学报, 2005, 22(6): 923. 李永平, 田强, 牛智川. Study of GaAs/Si/AlAs by DLTS technique[J]. Chinese Journal of Quantum Electronics, 2005, 22(6): 923.