介绍了为实现小型化相干布居囚禁(CPT)原子频标的激光频率锁定, 用以现场可编程门阵列(FPGA)为核心的数字控制电路将激光频率锁定在多普勒吸收峰的工作。以同样的控制方法将微波频率锁定在电磁感应透明(EIT)峰上之后, 实现了CPT原子频标样机整机锁定。基于FPGA用Verilog语言实现的CPT原子频标数字伺服系统具有电路结构清晰紧凑、参数设置更改方便、程序查错容易、功耗低、温度系数小等优点。受益于语言编写及数字电路的特点, 系统具有移植性和一致性好的优点。所研制出的CPT频标样机功耗4 W, 稳定度达到6×10－11τ－1/2, 表明该数字伺服电路方案是可行的。

We present the locking laser frequency on a Doppler absorption peak for the small size coherent population trapping (CPT) atomic frequency standard by using digital control circuit with a field-programmable gate array (FPGA) core. With the similar scheme to lock microwave frequency, it is realized of the close loop locking of the CPT frequency standard. There are many advantages of the digital servo system based on FPGA using Verilog language, such as compact structure, flexible parameter adjustment, easy debug, low power consumption, and small temperature coefficient, etc. Benefited from the characteristics of programming and digital circuit, the system is good in transplantation and consistency. With this digital servo scheme, the realized CPT frequency standard achieves 4-W power consumption and 6×10－11τ－1/2 frequency stability, which proves to be a feasible scheme.