基于FPGA的PCM帧同步检测及告警电路的设计
Design and implementation of an FPGA-based PCM frame synchronization detection and alarm system
摘要
帧同步单元是脉冲编码调制(PCM)设备中的重要部分。文章采用现场可编程门阵列(FPGA)设计了一种基于同步状态机的帧同步检测电路，该电路具有帧同步的前方保护、后方保护和循环冗余校验(CRC)复帧同步保护功能，大大降低了漏同步和假同步概率，并提供CRC误块检出功能，可以集成在一片FPGA芯片内，用于数字通信系统收端的帧同步和定时。
Abstract
Frame synchronization is an important part of PCM equipment. In this text, a synchronous state machine-based frame synchronization detection circuit is designed, which has front and rear protection for frame synchronization and protection for CRC multi-frame synchronization, greatly reducing the probabilities of leak and false synchronizations and providing CRC error detection. It can be integrated into one FPGA chip and used for the frame synchronization and timing in the receiver side of digital communication systems.
朱剑平, 李文耀. 基于FPGA的PCM帧同步检测及告警电路的设计[J]. 光通信研究, 2008, 34(2): 11. Zhu Jianping, Li Wenyao. Design and implementation of an FPGA-based PCM frame synchronization detection and alarm system[J]. Study On Optical Communications, 2008, 34(2): 11.
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