CRC32在光通信系统中的快速计算
Fast CRC32 calculations in optical communication systems
摘要
文章利用C++ 编程建立了一个可产生CRC32(32位循环冗余校验)各位并行计算的异或表达式生成模型, 并利用Verilog HDL语言在FPGA(现场可编程门阵列)上进行了验证, 结果表明, 该模型产生的各位异或表达式适合于高速数据传输情况下CRC32的并行计算。
Abstract
A Cyclic Redundancy Check (CRC) 32 generator is implemented in C++, which can be used to generate the exclusive OR expressions of each CRC32 bit simultaneously. Verifications in FPGA with the help of Verilog HDL show that the generated exclusive OR expressions are suitable for parallel calculations of CRC32 in high speed data transmission systems.
肖赛军, 冯勇华. CRC32在光通信系统中的快速计算[J]. 光通信研究, 2008, 34(6): 21. Xiao Saijun, Feng Yonghua. Fast CRC32 calculations in optical communication systems[J]. Study On Optical Communications, 2008, 34(6): 21.