Presented is a global dynamic reconfiguration design of an artificial neural network based on field programmable gate array (FPGA). Discussed are the dynamic reconfiguration principles and methods. Proposed is a global dynamic reconfiguration scheme using Xilinx FPGA and platform flash. Using the revision capabilities of Xilinx XCF32P platform flash, an artificial neural network based on Xilinx XC2V30P Virtex-Ⅱ can be reconfigured dynamically from back propagation (BP) learning algorithms to BP network testing algorithms. The experimental results indicate that the scheme is feasible, and that, using dynamic reconfiguration technology, FPGA resource utilization can be reduced remarkably.