激光多普勒测速雷达信号处理由于数据量大、实时性强等特点, 对信号处理单元的要求较高。现场可 编程门阵列(FPGA)具有高速、并行性等优点, 可以满足测速雷达的需求。介绍了利用单片FPGA实现激 光多普勒测速雷达信号处理的过程, 详细说明了数据的缓存、干扰频率的滤波、2倍降采样、快速傅 里叶变换(Fast Fourier Transform, FFT)和脉冲累积等步骤的FPGA实现, 最后分析了模块的性能并 给出了测试结果。

Because of large amount of data and real-time characteristics, the processing of the signal of a laser Doppler velocity radar needs a high performance processing module. The Field Programmable Gate Array (FPGA) with advantages of high speed and parallelism can meet this demand. The implementation of signal processing for a laser Doppler velocity radar with a FPGA chip is presented. The data buffer, interference frequency filtering, 2-fold down-sampling, Fast Fourier Transform (FFT) and pulse accumulating etc of the FPGA are described. Finally, the performance of the module is analyzed and its test result is given.