中国光学, 2014, 7 (2): 225, 网络出版: 2014-03-31
多子直方图均衡微光图像增强及FPGA实现
Multiple sub-histogram equalization low light level image enhancement and realization on FPGA
图像增强 直方图均衡 微光图像 实时性 image enhancement histogram equalization low light level image FPGA FPGA real time
摘要
针对微光图像对比度低,目标难以识别的问题,对微光图像增强算法进行了研究。提出了一种多子直方图均衡增强算法,该算法首先将直方图按面积平均分割成4个子直方图,利用平均像素数量作为阈值切割直方图降低过度增强现象,然后加入尺度因子对动态范围进行调整,最后分别对子直方图均衡得到增强效果。此算法用Verilog语言在现场可编程门阵列(FPGA)上具体实现,并给出了主观和客观的评价,改进算法能产生更清晰的图像,在硬件平台上也能实时显示增强效果,一帧图像处理时延约为045 ms。实验结果表明,改进算法不会产生饱和、噪声放大的现象,图像细节保持较好,满足视频图像处理实时性要求,得到了具有较好视觉效果的增强图像。
Abstract
In order to solve the problems that low light level image has low contrast and it is difficult to distinguish objective, it is necessary to research on low light level image enhancement algorithm. A multiple sub-histogram equalization enhancement algorithm is proposed. Initially, in the proposed algorithm, the histogram are separated into four parts according to the area equally. Then, the resultant sub-histograms are clipped according to the average number of pixels of input image to reduce the enhancement phenomenon. In addition, the scale factor is adopted to adjust dynamic range. Finally, each sub-histogram is equalized. The algorithm is implemented on FPGA with verilog language, and is given subjective and objective evaluation. With this algorithm good results can be achieved in real-time on the hardware platform, and the delay of an image processing is about 045 ms. Experimental results show that with this proposed algorithm no saturation and noise amplification phenomenon appear, and image details of the processed image are well preserved and highlighted. The algorithm meets the real-time requirement and the enhanced images of better visual effect can be achieved.
陈莹, 朱明. 多子直方图均衡微光图像增强及FPGA实现[J]. 中国光学, 2014, 7(2): 225. CHEN Ying, ZHU Ming. Multiple sub-histogram equalization low light level image enhancement and realization on FPGA[J]. Chinese Optics, 2014, 7(2): 225.