为了提升可逆比较器的通用性,进一步优化可逆比较器电路。 分析了比较器的输入与输出的逻辑关系, 提出并设计了一位可逆比较器(OBC)和一位可逆完全比较器(OBCC)。在此基础上将这两种器件进行级联, 可以快速生成通用可逆比较器的级联电路。与相关文献对比,该级联方法有效地减少了常量输入和垃圾输 出的同时,具有较低的量子代价,易于完成多位二进制数值在可逆电路中的比较。

The reversible comparator circuit was further optimized in order to improve the universality of reversible comparator. The logical relationship of inputs and outputs in comparator were analyzed. A one-bit reversible comparator (OBC) and a one-bit reversible complete comparator (OBCC) were presented and designed. The two devices can be cascaded and rapidly generated into a reversible circuit of universal reversible comparator. Compared with the related literatures, the cascaded method efficiently decreases the quantity of constant inputs and garbage outputs, meanwhile it has the lower quantum cost, which is prone to the comparison with two multi-bit numerical values in reversible circuit.