分析了核裂变与聚变情况下,典型能量的中子与半导体器件反应,所产生的次级粒子及其能谱分布.根据中子所能导致的最恶劣情况,讨论了65 nm工艺尺寸下,半导体静态存储器的单粒子效应,并给出了TCAD仿真的结果.结果显示,商用6管单元难以避免中子单粒子效应的发生.双互锁存储单元(DICE)结构在高密度设计时,也由于电荷共享效应,发生了单粒子翻转.由于电荷共享效应难以用SPICE仿真的方法得到,TCAD仿真更适用于中子单粒子免疫的SRAM设计验证.最后,讨论了65 nm工艺下,中子单粒子免疫的SRAM设计,指出6管单元加电容的方式,可能是更有竞争力的方案.

In the case of nuclear fission and fusion,typical energy neutrons acting on semiconductor devices are analyzed,and the distribution of the secondary particles and their energy spectra are generated.As for the worst case of the neutron,the single event effect (SEE) of Static Random Access Memory (SRAM) on 65 nm process is discussed,and the results of TCAD simulation are given.The results show that the 6 transistor SRAM cell commercial structure is difficult to avoid the SEE.Even Double Interlocked Storage Cell (DICE) structure,in the high density design,also due to the charge sharing effect,the occurrence of Single Event Upset (SEU).Because the charge sharing effect is difficult to obtain by SPICE simulation,the TCAD simulation is more suitable for the SRAM design and verification of the neutron single particle immune.At the end,the SRAM design of the neutron single particle immune on the 65nm process is discussed.It is possible to be more competitive in the way that the 6 transistor SRAM cell is added to the capacitor.