红外与激光工程, 2018, 47 (9): 0926001, 网络出版: 2018-10-06   

高性能交通标志检测模块的VLSI结构设计

High-performance VLSI architecture for traffic sign detection
作者单位
1 北京航空航天大学 仪器科学与光电工程学院, 北京 100191
2 东方赛光电有限公司, 江苏 南通 226001
3 哈尔滨工业大学 电子与信息工程学院, 黑龙江 哈尔滨 150001
4 天津中德应用技术大学, 天津 300350
摘要
交通标志检测是驾驶辅助系统的重要功能, 但对实时性极高的要求使其非常具有挑战性。提出了一种高性能禁令标志检测模块的VLSI结构, 并在FPGA平台上完成了实现和验证。该结构的基本原理是同时利用颜色与形状特征, 在图像的红色边缘位图中采用圆霍夫变换检测圆形。通过挖掘圆霍夫变换的局部特性, 所提出的结构在内存占用方面显著低于常规结构。所有半径同时投票的设计使FPGA的逻辑单元和内存的并行性得以充分发挥。该结构在Altera公司的EP3C55F484C6型FPGA上进行了验证, 其最大可运行频率达到122 MHz, 且资源占用在可接受范围内。实验结果表明: 该结构的吞吐量达到115 M像素/s, 且对低光照条件、局部遮挡、多标志相连和相似背景颜色等不利条件具有良好的适应能力。
Abstract
Traffic sign detection is an important function for driver assistant systems, but the high real-time requirement makes it a very challenging task. A high-performance prohibitory traffic sign detection VLSI (Very Large Scale Integration) architecture was presented. Both color and shape characteristics were utilized in the proposed architecture by detecting circles using circular Hough transform in the red edge bitmap. The local property of circular Hough transform was exploited so that the memory requirement was significantly reduced comparing with common architecture. All the radii were voted concurrently to make full use of the parallelism of logic elements and memory in FPGA. The proposed architecture was implemented on Altera′s EP3C55F484C6 FPGA. The maximum frequency of the implementation was 122 MHz and the resource requirement was acceptable. Experimental results show that the architecture can achieve a throughput up to 115 M pixels/s and was robust to adverse situations such as bad lighting condition, partial occlusion, multiple signs clustered and similar background color.

王刚毅, 金炎胜, 任广辉, 刘通. 高性能交通标志检测模块的VLSI结构设计[J]. 红外与激光工程, 2018, 47(9): 0926001. Wang Gangyi, Jin Yansheng, Ren Guanghui, Liu Tong. High-performance VLSI architecture for traffic sign detection[J]. Infrared and Laser Engineering, 2018, 47(9): 0926001.

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