Accurate extraction of fabricated geometry using optical measurement
We experimentally demonstrate extraction of silicon waveguide geometry with subnanometer accuracy using optical measurements. Effective and group indices of silicon-on-insulator (SOI) waveguides are extracted from the optical measurements. An accurate model linking the geometry of an SOI waveguide to its effective and group indices is used to extract the linewidths and thicknesses within respective errors of 0.37 and 0.26 nm on a die fabricated by IMEC multiproject wafer services. A detailed analysis of the setting of the bounds for the effective and group indices is presented to get the right extraction with improved accuracy.
基金项目：Fonds Wetenschappelijk Onderzoek (FWO)10.13039/501100003130 (G013815N); Agentschap Innoveren en Ondernemen (VLAIO)10.13039/100012331.
Jiaxing Dong：Photonics Research Group, Ghent University-IMEC, Ghent, BelgiumCenter of Nano and Biophotonics, Ghent, Belgium
Sarvagya Dwivedi：Electrical and Computer Engineering Department, University of California Santa Barbara, Santa Barbara, California 93106-9560, USA
Umar Khan：Photonics Research Group, Ghent University-IMEC, Ghent, BelgiumCenter of Nano and Biophotonics, Ghent, Belgium
Wim Bogaerts：Photonics Research Group, Ghent University-IMEC, Ghent, BelgiumCenter of Nano and Biophotonics, Ghent, Belgium
【1】S. Pathak, D. Van Thourhout, and W. Bogaerts, “Design trade-offs for silicon-on-insulator-based AWGs for (de)multiplexer applications,” Opt. Lett. 38 , 2961–2964 (2013).
【2】A. Ribeiro, S. Dwivedi, and W. Bogaerts, “A thermally tunable but athermal silicon MZI filter,” in 18th European Conference on Integrated Optics 2016 (ECIO) , Warsaw, Poland (2016).
【3】S. Dwivedi, H. D’heer, and W. Bogaerts, “Maximizing fabrication and thermal tolerances of all-silicon FIR wavelength filters,” IEEE Photon. Technol. Lett. 27 , 871–874 (2015).
【4】W. A. Zortman, D. C. Trotter, and M. R. Watts, “Silicon photonics manufacturing,” Opt. Express 18 , 23598–23607 (2010).
【5】Z. Lu, J. Jhoja, J. Klein, X. Wang, A. Liu, J. Flueckiger, J. Pond, and L. Chrostowski, “Performance prediction for silicon photonics integrated circuits with layout-dependent correlated manufacturing variability,” Opt. Express 25 , 9712–9733 (2017).
【6】T.-W. Weng, Z. Zhang, Z. Su, Y. Marzouk, A. Melloni, and L. Daniel, “Uncertainty quantification of silicon photonic devices with correlated and non-Gaussian random parameters,” Opt. Express 23 , 4242–4254 (2015).
【7】Y. Xing, D. Spina, A. Li, T. Dhaene, and W. Bogaerts, “Stochastic collocation for device-level variability analysis in integrated photonics,” Photon. Res. 4 , 93–100 (2016).
【8】W. Bogaerts, M. Fiers, and P. Dumon, “Design challenges in silicon photonics,” IEEE J. Sel. Top. Quantum Electron. 20 , 8202008 (2014).
【9】N. Ayotte, A. D. Simard, and S. Larochelle, “Long integrated Bragg gratings for SOI wafer metrology,” IEEE Photon. Technol. Lett. 27 , 755–758 (2015).
【10】X. Wang, W. Shi, H. Yun, S. Grist, N. A. F. Jaeger, and L. Chrostowski, “Narrow-band waveguide Bragg gratings on SOI wafers with CMOS-compatible fabrication process,” Opt. Express 20 , 15547–15558 (2012).
【11】S. Dwivedi, A. Ruocco, M. Vanslembrouck, T. Spuesens, P. Bienstman, P. Dumon, T. Van Vaerenbergh, and W. Bogaerts, “Experimental extraction of effective refractive index and thermo-optic coefficients of silicon-on-insulator waveguides using interferometers,” J. Lightwave Technol. 33 , 4471–4477 (2015).
【12】T. Horikawa, D. Shimura, H. Takahashi, J. Ushida, Y. Sobu, A. Shiina, M. Tokushima, S.-H. Jeong, K. Kinoshita, and T. Mogami, “Extraction of SOI thickness deviation based on resonant wavelength analysis for silicon photonics devices,” in IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) (IEEE, 2017), vol.?10, pp.?1–3.
【13】W. Bogaerts, and L. Chrostowski, “Silicon photonics circuit design: methods, tools and challenges,” Laser Photon. Rev. 12 , 1700237 (2018).
【14】S. K. Selvaraja, W. Bogaerts, P. Dumon, D. Van Thourhout, and R. Baets, “Subnanometer linewidth uniformity in silicon nanophotonic waveguide devices using CMOS fabrication technology,” IEEE J. Sel. Top. Quantum Electron. 16 , 316–324 (2010).
【15】S. K. Selvaraja, E. Rosseel, L. Fernandez, M. Tabat, W. Bogaerts, J. Hautala, and P. Absil, “SOI thickness uniformity improvement using corrective etching for silicon nano-photonic device,” in IEEE International Conference on Group IV Photonics GFP (2011), pp.?71–73.
【16】S. K. Selvaraja, “Wafer-Scale Fabrication Technology for Silicon Photonic Integrated Circuits ,” Ph.D. thesis (University of Ghent, 2011).
【17】R. G. Beausoleil, A. Faraon, D. Fattal, M. Fiorentino, Z. Peng, and C. Santori, “Devices and architectures for large-scale integrated silicon photonics circuits,” Proc. SPIE 7942 , 794204 (2011).
【18】X. Chen, M. Mohamed, Z. Li, L. Shang, and A. R. Mickelson, “Process variation in silicon photonic devices,” Appl. Opt. 52 , 7638–7647 (2013).
【19】S. K. Selvaraja, G. Winroth, S. Locorotondo, G. Murdoch, A. Milenin, C. Delvaux, P. Ong, S. Pathak, W. Xie, G. Sterckx, G. Lepage, D. Van Thourhout, W. Bogaerts, J. Van Campenhout, and P. Absil, “193??nm immersion lithography for high-performance silicon photonic circuits,” Proc. SPIE 9052 , 90520F (2014).
【20】M. Fiers, T. Van Vaerenbergh, J. Dambre, and P. Bienstman, “CAPHE: time-domain and frequency-domain modeling of nonlinear optical components,” in Advanced Photonics Congress , OSA Technical Digest (Optical Society of America, 2012), paper?IM2B.3.
【21】D.-X. Xu, J. H. Schmid, G. T. Reed, G. Z. Mashanovich, D. J. Thomson, M. Nedeljkovic, X. Chen, D. Van Thourhout, S. Keyvaninia, and S. K. Selvaraja, “Silicon photonic integration platform—have we found the sweet spot?” IEEE J. Sel. Top. Quantum Electron. 20 , 8100217 (2014).
Yufei Xing, Jiaxing Dong, Sarvagya Dwivedi, Umar Khan, and Wim Bogaerts, "Accurate extraction of fabricated geometry using optical measurement," Photonics Research 6(11), 1008-1020 (2018)