研究了数控延时器(TTD)芯片的基础原理，基于GaAs PHEMT工艺，设计了一款超宽带数控延时器芯片，该芯片具有超宽带、大延时量和小尺寸等优点，主要用于有源相控阵雷达中。微波在片测试系统对该6位延时器芯片实际测试结果显示，在3~17 GHz范围内，延时调节范围为10~630 ps，64态延时均方根(RMS)误差小于8 ps，全态插入损耗小于22 dB，插损波动小于±1 dB，全频带输入输出电压驻波比(VSWR)小于1.7，整个芯片尺寸仅为4.0 mm×2.6 mm×0.07 mm。实测结果与理论仿真结果吻合良好。

The design principle of the True-Time Delay(TTD) chip is studied. Based on GaAs PHEMT technology, the ultra wideband TTD is designed and fabricated. The TTD chip is characterized with ultra wideband, large time delay and compact size and mainly applied to wideband active phased array applications. The measured results on wafer show that the 6 bit TTD provides 10 ps up to 630 ps with an interval of 10 ps in the frequency range 3 GHz to 17 GHz. The Root Mean Square(RMS) error for all 64 bit states is below 8 ps. The insertion loss is below 22 dB. And the 64-states insertion variation is reduced to ±1 dB. The input and output Voltage Standing Wave Ratio(VSWR) are better than 1.7 on the whole bandwidth. The dimension of the chip is 4.0 mm×2.6 mm×0.07 mm. The simulation results are in good agreement with the measured results.