针对雷达干扰信号模拟中算法设计快速验证的应用需求，为降低系统可重构开发中的复杂程度，研究了一种基于 System Generator模型的 FPGA设计开发方法，并以噪声调频和噪声卷积算法实现。对应用实例进行了设计演示验证，为雷达干扰信号算法验证实验提供技术参考。

According to the application requirements for fast validating the algorithm design in radar jamming signal simulation, a kind of FPGA design method based on System Generator model is developed in order to reduce the complexity of reconfigurable system development. Then the noise modulation and noise convolution algorithm are designed for demonstration as an example. The investigation results can provide technical reference for the verification experiment of radar jamming signal algorithm.