针对当前10 Gb/s以上高速SerDes接口中的8B/10B编码需求, 在传统的多通道编码器上对其结构进行改进, 加入了极性快速产生模块, 降低了编码器内部通道的等待时间, 提升了并行编码的效率, 在提高了数据传输速率的同时, 降低了编码输出延时。电路的仿真结果表明: 编码器在四通道与八通道模式下, 数据传输速率分别达到了20.6 Gb/s与38.4 Gb/s, 编码输出延时均为1个时钟周期, 填补了国内低延时高速8B/10B编码器的空白。

In view of the current over 10 Gb/s high-speed SerDes interface of 8B/10B encoding requirement, this paper is based on the traditional multi-channel encoder and improves its structure. The polarity quick generation module is added and it reduces the waiting time of internal channel encoder. The efficiency of parallel encoding and data transmission rate are improved. Meanwhile, the output coding latency declines. The simulation results of the circuit show that the data transmission rate of the encoder reaches 20.6 Gb/s and 38.4 Gb/s respectively in the four-channel and eight-channel modes, and the coding output latency is one clock cycle, which fills the gap of the domestic low-delay high-speed 8B/10B encoder.