光学与光电技术, 2017, 15 (3): 65, 网络出版: 2017-07-10
低温大功率电阻阵列封装设计与仿真分析
Low Temperature High-Power Resistor Array Detector Packaging Design and Simulation Analysis
摘要
电阻阵列探测器规模已经达到256×256,红外景象生成器要求像素规模能够进一步提高,达到512×512及以上。空间低温动态场景模拟用512×512电阻阵探测器的极端功耗高达500 W,并且其工作温度为100 K的低温。设计了低温大功率电阻阵列的封装结构,并对该结构进行了热力学仿真分析与实验验证。电阻阵列探测器封装在内部为真空的壳体内,以液氮为循环介质的大冷量换热装置,探测器安装在换热装置的冷端上。仿真分析表明通过液氮可以实现探测器低于100 K的制冷;采用试验件对制冷性能进行了验证,验证结果表明设计可行、合理。
Abstract
Resistor array detector size of 256×256 has been used, but infrared scene simulation system needs the pixel size reach up to 512×512 and above. The extreme power of resistor array detector for space dynamic infrared simulation application will be 500 W and the working temperature is about 100 K. In this paper, a resistor array assembly structure for low temperature high-power application is designed, and the thermodynamic simulation analysis and experimental verification are carried out. The resistor array detector is packaged inside a vacuum cavity. In order to achieve high power resistor array detector cooling, the detector is installed on the cold end of circulator, which uses liquid nitrogen as a circulation medium. The simulation analysis shows that the detector temperature can be cold to 100 K. A validation test pieces, for cooling performance test, the feasibility and rationality of the design are verified.
刘大福, 徐勤飞, 莫德锋, 马斌, 徐琳, 蒋梦蝶, 陆华杰. 低温大功率电阻阵列封装设计与仿真分析[J]. 光学与光电技术, 2017, 15(3): 65. 刘大福, 徐勤飞, 莫德锋, 马斌, 徐琳, 蒋梦蝶, 陆华杰. Low Temperature High-Power Resistor Array Detector Packaging Design and Simulation Analysis[J]. OPTICS & OPTOELECTRONIC TECHNOLOGY, 2017, 15(3): 65.