半导体光电, 2017, 38 (4): 521, 网络出版: 2017-08-30
热氧化方法制备直径可控的有序硅纳米线阵列
Synthesis of Ordered Silicon Nanowire Array with Controllable Diameter by Thermal Oxidation Method
金属辅助化学刻蚀 热氧化 低直径/周期比 硅纳米线 扩展Deal-Grove模型 metal-assisted chemical etching thermal oxidation low diameter-to-pitch ratio silicon nanowire extended Deal-Grove model
摘要
采用金属辅助化学刻蚀方法结合纳米球模板技术制备出了有序硅纳米线阵列。硅纳米线阵列经过高温热氧化形成一定厚度的氧化层, 再使用稀释的HF溶液去除表面氧化层得到可控直径/周期比、低孔隙密度的有序纳米线阵列。主要研究了氧化温度、氧化时间对硅纳米线形貌的影响, 并根据扩展的Deal-Grove模型计算了硅纳米线氧化层厚度与氧化时间的关系, 讨论了氧化过程中应力分布的影响, 理论计算结果与实验结果一致。最后, 采用两步氧化的方法制备出了低直径/周期比(约0.1)、低孔隙密度的有序硅纳米线阵列。
Abstract
The ordered silicon nanowire array is fabricated by using the metal-assisted chemical etching (MACE) method combing with the nanosphere template technology. The silicon nanowire arrays undergo a high temperature thermal oxidation to form a certain thickness of the oxide layer, then the surface oxide layer is removed by using the diluted HF solution to form the ordered silicon nanowire (Si NW) arrays with controllable diameter-to-pitch (D/P) ratio and low porosity density. In this paper, the influences of thermal oxidation temperature and thermal oxidation time on the morphology of Si NWs are studied. According to the extended Deal-Grove model, we calculate the relationship between the oxide layer thickness and thermal oxidation time and discuss the effect of stress distribution during thermal oxidation process. The theoretical calculation results are in agreement with the experimental results. Finally, an ordered Si NW array with low D/P(~0.1) and low porosity density is created by using the two-step thermal oxidation process.
周步康, 李新化, 曹华翔, 史同飞, 陈涛, 郑建强, 王玉琦. 热氧化方法制备直径可控的有序硅纳米线阵列[J]. 半导体光电, 2017, 38(4): 521. ZHOU Bukang, LI Xinhua, CAO Huaxiang, SHI Tongfei, CHEN Tao, ZHENG Jianqiang, WANG Yuqi. Synthesis of Ordered Silicon Nanowire Array with Controllable Diameter by Thermal Oxidation Method[J]. Semiconductor Optoelectronics, 2017, 38(4): 521.