光学学报, 2020, 40 (1): 0111023, 网络出版: 2020-01-06  

基于单幅图像的集成电路引脚共面性检测方法 下载: 1205次

Coplanarity Inspection Method for Integrated Circuit Pins Based on Single Image
作者单位
汕头大学智能制造技术教育部重点实验室, 广东 汕头 515063
摘要
集成电路(IC)芯片引脚的共面性检测是确保其贴装质量的关键。基于单幅图像提出一种IC引脚共面性检测方法。首先,基于单目视觉系统建立相机、光源和被测表面的关系模型;其次,给出发光二极管(LED)环形结构光源的光强标定方法,并通过实验确定被测IC引脚材质的相关参数;然后,基于建立的光强与图像灰度的关系模型给出高度信息的求解方法;最后,基于高度信息还原IC引脚及其焊点的表面三维形貌。实验结果表明,本文方法检测IC芯片引脚及其焊点的实验结果与实际测量结果相比,其高度测量误差小于±0.08 mm,相对误差为-2.6%,验证了本文方法的有效性。
Abstract
Inspection of the coplanarity of pins in an integrated circuit (IC) is a very important process for ensuring the mounting quality of IC. In this paper, a coplanarity inspection method for IC pins based on a single image is proposed. First, a relation model that contains a camera, light source, and measured surface is constructed. This model is based on a monocular vision system. Then, the light intensity calibration method of a light emitting diode (LED) ring-structured light source is described, and the correlative parameter of the measured IC pin material is experimentally obtained. Further, a method for estimating the height information based on the constructed relationship model of light intensity and image grayscale is presented. Finally, the surface three-dimensional morphology of the IC pins and their solder joints are recovered using the height information. In comparison with the actual measurement results for IC pins and their solder joints, the experimental measurement results obtained in this work show that the measurement error for height is less than ±0.08 mm, and the relative error is within -2.6%, which verifies the effectiveness of the proposed method.

吴福培, 朱树锴, 李昇平. 基于单幅图像的集成电路引脚共面性检测方法[J]. 光学学报, 2020, 40(1): 0111023. Fupei Wu, Shukai Zhu, Shengping Li. Coplanarity Inspection Method for Integrated Circuit Pins Based on Single Image[J]. Acta Optica Sinica, 2020, 40(1): 0111023.

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