Journal of Semiconductors, 2022, 43 (5): 054102, Published Online: Jun. 10, 2022  

Uniform, fast, and reliable CMOS compatible resistive switching memory

Author Affiliations
1 Key Laboratory of Microelectronic Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China
2 University of Chinese Academy of Sciences, Beijing 100049, China
3 School of Integrated Circuits, Anhui University, Hefei 230601, China
4 Frontier Institute of Chip and System, Fudan University, Shanghai 200433, China
Abstract
Resistive switching random access memory (RRAM) is considered as one of the potential candidates for next-generation memory. However, obtaining an RRAM device with comprehensively excellent performance, such as high retention and endurance, low variations, as well as CMOS compatibility, etc., is still an open question. In this work, we introduce an insert TaOx layer into HfOx-based RRAM to optimize the device performance. Attributing to robust filament formed in the TaOx layer by a forming operation, the local-field and thermal enhanced effect and interface modulation has been implemented simultaneously. Consequently, the RRAM device features large windows (> 103), fast switching speed (~ 10 ns), steady retention (> 72 h), high endurance (> 108 cycles), and excellent uniformity of both cycle-to-cycle and device-to-device. These results indicate that inserting the TaOx layer can significantly improve HfOx-based device performance, providing a constructive approach for the practical application of RRAM.

1. Introduction

With the advent of the information age and the development of emerging technologies (such as IoT, 5G etc.), the amount of data generated by human society explodes, which brings the demand for high-density non-volatile memory (NVM) to store and process data[1-3]. Resistive switching random access memory (RRAM) devices, with the advantages of high switching speed[4, 5], high scalability (two-terminal structure)[6-8], low power consumption[9-11], and good compatibility with the back-end of the traditional CMOS process[12, 13], is considered as an excellent choice for high-density NVM. However, a RRAM device with comprehensively excellent performance, such as high retention and endurance, low variations, as well as CMOS compatibility, etc., is still an open question, which hinders the practical application of RRAM.

In prior works, researchers proposed various methods to improve the RRAM performance for practical applications. For example, localized filed enhancement effect by embedding of nanoscale materials in the electrode or resistive switching layer, etc., was adopted to improve the uniformity of RRAM devices[14, 15]. The thermal enhancement effect can accelerate the movement of oxygen vacancies/ions, decreasing the formation and rupture time of conductive filament (CF) and enabling fast switching performance[16]. Besides, inserting an additional thin film between the resistive switching layer and the electrode was used to improve the endurance of RRAM devices[17, 18]. Hence, synergying the field, thermal enhancement and interface modulation effect is a potential method to obtain the comprehensive excellent performance RRAM device. However, incorporating all of these factors to improve the RRAM device performance has rarely been reported.

TaOx with a low thermal conductance has been inserted into TaOx-based RRAM device as a thermal enhance and oxygen reservoir layer to modulate the RRAM performance in previous works[19, 20]. By forming a local CF in the TaOx layer to confine the electric field and current path, the local electric field and thermal enhancement effect can be achieved.

In this work, we inserted a TaOx layer into HfOx-based RRAM devices. Due to the localized field and thermal enhancement effect of the TaOx layer could be obtained by formation of confined CF after the forming process, the device performance could be modulated by all of the factors simultaneously and shows comprehensively excellent performance. The results indicated that the device could exhibit uniform switching, fast switching (~ 10 ns), steady retention (> 72 h) and high endurance (> 108 cycles) properties. These results provide a constructive approach for the practical application of RRAM.

2. Experimental section

2.1. Fabrication of Samples

The fabrication processes of Pt/Ti/TaOx/HfOx/Pt/Ti devices are as follow: Firstly, deposited the bottom electrode Pt/Ti (40/5 nm) by e-beam evaporation after the lithography process. The photoresist is removed by the lift-off process. Here, the former deposited Ti layer acts as an adhesive layer. Secondly, similar to the above-mentioned bottom electrode preparation process, deposited the dielectric layer TaOx/HfOx (10/10 nm) by magnetron sputtering. Thirdly, similarly, depositied the top electrode Pt/Ti (10/40 nm) by magnetron sputtering. Here, the deposited Pt layer acts as a capping layer.

Also, the fabrication processes of Pt/Ti/HfOx/Pt/Ti and Pt/Ti/TaOx/Pt/Ti devices were as same as the above-mentioned.

2.2. Characterization

The SEM image of the device was obtained on Carl Zeiss Supra 55 Sapphire. The DC-mode and pulse mode characteristics of the device were measured at room temperature using an Agilent B1500A Semiconductor Characterization System. For all DC-mode and pulse mode measurements, the bias was applied to the top electrode and the bottom electrode was grounded.

3. Results and discussion

In our work, the RRAM device is fabricated in a typical crossbar structure. The schematic structure of the device is shown in Fig. 1(a). And the insert shows the scanning electron microscope (SEM) result of the as-fabricated device. After the fabrication of the device, we characterized the device response property under DC voltage sweep. During the electrical measurement, the external voltage is applied on the top electrode (Ti), and the bottom electrode (Pt) is grounded. Fig. 1(b) shows the typical bipolar resistive switching behavior of Ti/TaOx/HfOx/Pt (red) and Ti/HfOx/Pt (gray) device. When the positive voltage sweep (0 V → 3 V → 0 V) is applied to the device, the device switches from a high-resistance state (HRS) to a low-resistance state (LRS), namely SET process. Here, a compliance current (Icc, 100 μA) was set to avoid the hard broken of the device. The negative voltage sweep (0 V → –3 V → 0 V) induces the device switching from LRS to HRS, namely, RESET process. Intuitively, the Ti/TaOx/HfOx/Pt device switching parameters (such as HRS, LRS, VSET, and VRESET) show excellent cycle-to-cycle uniformity. To clearly present the uniformity, we draw the cumulative distribution of these switching parameters in Ti/TaOx/HfOx/Pt device, as shown in Fig. 1(c). For the HRS/LRS distribution (left panel of Fig. 1(c)), we obtain that the LRS (HRS) average is 5 kΩ (17 MΩ) with a low standard deviation of 53 Ω (155 kΩ), indicating a low variation of ~1.06% (0.91%) in LRS (HRS). For operation voltages (right panel of Fig. 1(c)), the VSET (VRESET) averages are 2.0 V (–1.25 V) with a standard deviation of 0.16 V (0.15 V), indicating a variation of ~ 8% (12%). These results show that the Ti/TaOx/HfOx/Pt device could switch between the LRS and HRS with excellent uniform parameters. Additionally, in order to study the potential of the device as NVM in practical application, we investigate the resistance state retention ability by imposing a constant read voltage (0.2 V) on the device, as shown in Fig. 1(d). The both of HRS and LRS show no degradation under read voltage stress for more than 3.5 × 104 s. Furthermore, both of the HRS and LRS could still maintain after more than 72 h, as shown in the insert of Fig. 1(d). These results indicate that the Ti/TaOx/HfOx/Pt device shows excellent retention property for both resistance states.

Fig. 1. (Color online) Structure and switching performances of the Ti/TaOx/HfOx/Pt device. (a) Schematic of the Ti/ TaOx/HfOx/Pt device with a crossbar structure. The inset shows the SEM result of the as-fabricated device, the feature size of the fabricated device is 5 × 5 μm2. (b) The cyclic I–V curves of Ti/TaOx/HfOx/Pt (red) and Ti/HfOx/Pt (gray) device, which exhibits a typical bipolar resistive switching with uniform switching property. (c) The cumulative distribution of the resistance states (HRS and LRS) and operation voltages (VSET and VRESET) of Ti/TaOx/HfOx/Pt device. The HRS and LRS of Ti/TaOx/HfOx/Pt device is 17 ± 0.155 MΩ and 5 ± 0.053 kΩ, respectively. The VSET and VRESET of the device is 2.0 ± 0.16 V and –1.25 ± 0.15 V, respectively. (d) Retention characteristics of the HRS and LRS of Ti/TaOx/HfOx/Pt device for more than 3.5 × 104 s. The insets show the measurement results after 24 and 72 h, respectively. The result shows the device with good retention property in both HRS and LRS.

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Then, the response characteristics of the Ti/TaOx/HfOx/Pt device under pulse stimulus were investigated. Here, a strong pulse stimulus is essential for initialization the device for extreme fast pulse operation, called the initialization pulse. Fig. 2(a) shows the initialization pulse operation of the device. The pulses with identical width (100 ns) and different amplitudes for SET (3 V), RESET (–3 V), and Read (0.2 V) processes, respectively. In order to verify whether the switching of the device is successful, the read pulse (0.2 V) is set to before and after of each SET or RESET pulse. The result indicates that the device could be successfully programmed by this initialization pulse. In addition, as marked by the measuredV–t (bule) and I–t (red) synchronous curves in Fig. 2(a), the SET speed of the device is about 20 ns under a 3 V/100 ns SET pulse.

Fig. 2. (Color online) The pulse mode switching characteristics of the Ti/TaOx/HfOx/Pt devices. (a) The device response characteristics of the initialization pulse operation. (b) The switching cycles of the device under extreme fast pulse stimulus. (c) The distribution of HRS/LRS under pulse mode switching. The statistical results show that this distribution conform to the lognormal distribution, indicating a uniform switching property of the device under pulse stimulus. (d) The Ti/TaOx/HfOx/Pt device exhibits reliable endurance for more than 108 cycles, each box in the figure representing 300 switching cycles. (e) The endurance property of the Ti/HfOx/Pt device, each box in the figure representing 100 switching cycles. (f) Comparison of I–V characteristics curves of the Ti/TaOx/HfOx/Pt device before (black line) and after (red line) the pulse measurement.

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Furthermore, after the operation of the initialization pulse, consecutive extreme fast pulses were imposed on the device, as shown in Fig. 2(b). Here, a triangle pulse was used for SET and RESET process. Both the SET and RESET pulse is 10 ns rising edge and falling edge. Furthermore, due to both, the rising edge and falling edge of the triangle pulse is 10 ns, so that the full width at half maximum (FWHM) is 10 ns. Which means the device switching speed is about 10 ns. The pulse amplitude of SET and RESET process is 1.5 and –3 V, respectively. Read pulse with an amplitude of 0.2 V and width of 100 ns in order to read accurately. The results in Fig. 2(b) show that the devices can be tested under high frequency of MHz magnitude. The switching between HRS and LRS of the device can be clearly distinguished by the read response current. Where the former read current of SET pulse is lower than latter one and the former read current of RESET pulse is higher than the latter one. The device exhibits excellent reliability under this extreme fast pulse stimulation. What is more, the 3000 cycles HRS (left in Fig. 2(c)) and LRS (right in Fig. 2(c)) of the device under this extreme fast pulse stimulation were statistically analyzed, as shown in Fig. 2(c). The results exhibit that both of the HRS and LRS distribution conform to the lognormal distribution, indicating a uniform switching property of the device under pulse stimulus. Furthermore, the devices sustained more than 108 SET/RESET cycles under this extreme fast pulse stimulation, as shown in Fig. 2(d). Here, we extracted 300 cycles at each order. Each box in Fig. 2(d) respresents the resistance distribution of 300 cycles. However, the Ti/HfOx/Pt device endurance property is worse obviously than the Ti/TaOx/HfOx/Pt device, as shown in Fig. 2(e). It is worth noting that the Ti/HfOx/Pt device cannot be operated by the extreme fast pulse. The pulses with identical width (100 ns) and different amplitudes for SET (3 V), RESET (–3 V), and Read (0.2 V) processes, respectively, were used to characterize the Ti/HfOx/Pt device endurance property. Furthermore, in Figs. 2(d) and 2(e), the uniformity of the Ti/TaOx/HfOx/Pt device is obviously better than the Ti/HfOx/Pt device.

It is worth noting that, after the pulse measurements, the DC I–V sweep was imposed on the Ti/TaOx/HfOx/Pt device again to verify the performance of the device. As shown in Fig. 2(f), comparison ofI–V characteristics of the device before (black line) and after (red line) the pulse measurements, indicating the resistance switching performance of the device is basically unchanged. This further confirms that the Ti/TaOx/HfOx/Pt device has excellent endurance. These results indicate that synergying the field, thermal enhancement and interface modulation effect is a method to obtain uniform, fast, and reliable device for practical NVM application.

The switching mechanisms of the device were analyzed. The HfOx-based RRAM device has been investigated widely[21-23]. However, the device with these attractive performances simultaneously has been rarely reported. Here, a TaOx layer was inserted in the HfOx-based RRAM device with the functions of confining E and J effects to optimize the performances of HfOx-based RRAM devices. It should be noted that, in previous works[19, 20], the thermal enhance property of TaOx was used to modulated the resistance switching performance of the HfOx based device. By inserting the TaOx thermal enhance layer, the HfOx-based device transition from abrupt switching to analog switching. However, in our work, the results are different from previous works[19, 20]. There is a difference in the TaOx layer between our work and previous works. In previous work, the TaOx layer is in LRS[19]. Whereas, in our work, the TaOx layer is in HRS state before the forming process. The intial HRS state TaOx obtained by modulating the oxygen/argon ratio during the spurting TaOx process. As indicated in Fig. 3(a), the intial state increases with the increment oxygen ratio. Furthermore, when oxygen ratio lower than 10%, the Ti/TaOx/Pt cannot be reset after the forming process. To form the robost CF in TaOx layer, the lower oxygen ratio would be preferable. Whereas the thermal conductivity increases with the decrement of oxygen ratio [24]. Hence, in this work, the oxygen ratio with 8% was used to deposite the TaOx insertion layer.

Fig. 3. (Color online) (a) The response property of Ti/TaOx/Pt device before and after the forming process. The initial resistance state modulated by the oxygen percentage during the spurting of the TaOx process. Schematic switching mechanisms of the Ti/TaOx/HfOx/Pt device. (b) Initial state, (c) forming process, (d) RESET process and (e) SET process.

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The switching mechanisms of our device is summarized as the following. First, there are no CFs in the dielectric layers before the forming process, as shown in Fig. 3(b). Then the forming operation was performed on the device, inducing the formation of CFs in the dielectric layers, as illustrated in Fig. 3(c). The formed CFs confine the location of E and current through (namely, J) the device. The localized E and J would facilitate the rupture of the CFs during the RESET process, as illustrated in Fig. 3(d), inducing a uniform RESET property. Furthermore, due to the filament in the TaOx layer, this cannot be dissolved during the RESET process. Hence, when the set operation performed on the device, the confined E and J in TaOx layer would prompt the formation of the CFs in HfOx layer, as illustrated in Fig. 3(e), inducing a uniform SET property.

To further verify the switching mechians of the device, we investigated the cross-sectional high-resolution transmission electron microscopy (HRTEM) image and elements component profile and of devices under different operation conditions by energy dispersive spectrum (EDS), as shown in Fig. 4. As illustrated in Fig. 4(a), the HRTEM image shows that both of the HfOx and TaOx layer of the pristine device are in the amorphous state. In addition, the O/Hf and O/Ta ratio in the dielectric layer (HfOx/TaOx) of the pristine device is high, as shown in Fig. 4(e), and the device presents HRS. In the formed device, a crystalline region is in the HfOx layer and the TaOx layer is in amorphous state, as indicated in Fig. 4(b). The crystalline region is identified as h-Hf6O through fast Fourier transform (FFT)[25], which is a high conduction phase[25, 26]. The EDS line scan results indicate that the O/Hf and O/Ta ratio in the CF region reduced obviously after the forming operation, as shown in Fig. 4(f). Furthermore, the O/Hf and O/Ta ratio in the CF surrounding region is higher, as illustrated in Fig. 4(g). The results suggest that the oxygen vacancy CF formed in the device, after forming operation. The CF in the HfOx layer exhibits as Hf6O crystalline, which is similar to our previous work[25], whereas the CF in TaOx layer is amorphous, which is similar to previous work[27]. In the RESET device, the HRTEM image shows that there is a crystalline region in the HfOx layer and the TaOx layer is in the amorphous state, as shown in Fig. 4(c). Here, the crystalline region is identified as t-HfO through FFT[25]. The conductivity of t-HfO is lower than h-Hf6O[26], which attributed to the HRS. The EDS line scan results indicate that the O/Hf ratio in the CF region reduced obviously after the RESET operation, and the O/Ta ratio shows lower variation, as shown in Fig. 4(h). Furthermore, the O/Hf and O/Ta ratio in the CF surrounding region is higher, as illustrated in Fig. 4(i). These results indicate that the h-Hf6O CF in HfOx layer is reset into t-HfO by RESET operation and the oxygen vacancy CF in TaOx layer cannot be reset by RESET operation. Finally, in the SET device, the HRTEM images shows the similar results to Fig. 4(a) of the device under SET operation, as shown in Fig. 4(d). The O/Hf and O/Ta ratio in the CF region (Fig. 4(j)) and CF surrounding region (Fig. 4(k)) of the device under SET operation is similar to the forming operation. All the results further support the aforementioned analysis of the switching mechanism of the device.

Fig. 4. (Color online) The cross-sectional HRTEM image and the element component profile of the device under different operation conditions. The cross-sectional HRTEM image of (a) intial state, (b) forming, (c) RESET, (d) SET. (e) The element component profile of the pristine device. The (f) CF and (g) out of CF element component profile of the device under the forming operation. The (h) CF and (i) out of CF element component profile of the device under the RESET operation. The (j) CF and (k) out of the CF element component profile of the device under SET operation.

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4. Conclusion

In conclusion, in this work, a TaOx layer was inserted in the HfOx-based RRAM device by taking advantage of all the field, thermal and interface modulation factors simultaneously to optimize the device performance. As a result, the Ti/TaOx/HfOx/Pt device shows excellent switching uniformity. In addition, the device also shows fast switching speed (~ 10 ns), steady retention (> 72 h) and reliable endurance (> 108 cycles). These desired performances implement in the same device simultaneously, making it a potential for practical NVM application.

5 Acknowledgements

This work was supported by the National Key R&D Program of China under Grant No. 2018YFA0701500, the National Natural Science Foundation of China under Grant Nos. 61825404, U20A20220, 61732020, and 61851402, the Strategic Priority Research Program of the Chinese Academy of Sciences under Grant No. XDB44000000 and the China Postdoctoral Science Foundation under Grant No. 2020M681167.

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Yunxia Hao, Ying Zhang, Zuheng Wu, Xumeng Zhang, Tuo Shi, Yongzhou Wang, Jiaxue Zhu, Rui Wang, Yan Wang, Qi Liu. Uniform, fast, and reliable CMOS compatible resistive switching memory[J]. Journal of Semiconductors, 2022, 43(5): 054102.

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