Shujun Liu 1Ruitao Ma 1Zejie Yu 1,2,3Yaocheng Shi 1,2,3,4Daoxin Dai 1,2,3,4,*
Author Affiliations
Abstract
1 Zhejiang University, College of Optical Science and Engineering, International Research Center for Advanced Photonics, State Key Laboratory for Extreme Photonics and Instrumentation, Hangzhou, China
2 Jiaxing Key Laboratory of Photonic Sensing and Intelligent Imaging, Jiaxing, China
3 Zhejiang University, Jiaxing Research Institute, Intelligent Optics and Photonics Research Center, Jiaxing, China
4 Zhejiang University, Ningbo Research Institute, Ningbo, China
A silicon-based digitally tunable positive/negative dispersion controller (DC) is proposed and realized for the first time using the cascaded bidirectional chirped multimode waveguide gratings (CMWGs), achieving positive and negative dispersion by switching the light propagation direction. A 1 × 2 Mach–Zehnder switch (MZS) and a 2 × 1 MZS are placed before and after to route the light path for realizing positive/negative switching. The device has Q stages of identical bidirectional CMWGs with a binary sequence. Thus the digital tuning is convenient and scalable, and the total dispersion accumulated by all the stages can be tuned digitally from - ( 2Q - 1 ) D0 to ( 2Q - 1 ) D0 with a step of D0 by controlling the switching states of all 2 × 2 MZSs, where D0 is the dispersion provided by a single bidirectional CMWG unit. Finally, a digitally tunable positive/negative DC with Q = 4 is designed and fabricated. These CMWGs are designed with a 4-mm-long grating section, enabling the dispersion D0 of about 4.16 ps / nm in a 20-nm-wide bandwidth. The dispersion is tuned from -61.53 to 63.77 ps / nm by switching all MZSs appropriately, and the corresponding group delay is varied from -1021 to 1037 ps.
silicon photonics dispersion tuning digital tuning multimode waveguide grating 
Advanced Photonics
2023, 5(6): 066005
龙洋 1,2高同强 1杨海钢 1,2,*
作者单位
摘要
1 中国科学院电子学研究所, 北京 100190
2 中国科学院大学微电子学院, 北京 100190
设计了一款应用于无线脑电信号 (EEG)检测系统的射频发射机芯片。该发射机采用标准的 0.18 μm CMOS工艺设计, 主要包含锁相环 (PLL)和功率放大器 (PA)模块。锁相环电路中采用新型 16/17预分频器结构以提高分频器的工作频率, 同时压控振荡器采用数字调谐与模拟调谐相结合的方式拓宽了频率输出范围。测试结果显示, 锁相环输出频率范围为 2 225~2 580 MHz, 锁定时间约为 49 μs, 发射机采用高效率 E类功率放大器, 最大输出功率达-3.14 dBm。发射数据采用二进制启闭键控 (OOK)调制方式, 最大传输速率可达 5 Mbps。
锁相环 16/17预分频 数字调谐 模拟调谐 启闭键控 (OOK) Phase-Lock Loop 16/17 prescaler digital tuning analog tuning On-Off Keying 
太赫兹科学与电子信息学报
2018, 16(2): 347

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