Chinese Optics Letters, 2016, 14 (1): 010601, Published Online: Aug. 6, 2018  

Field-programmable gate array-based large-capacity sensing network with 1642 ultra-weak fiber Bragg gratings Download: 885次

Author Affiliations
1 National Engineering Laboratory for Fiber Optic Sensing Technology, Wuhan University of Technology, Wuhan 430070, China
2 Key Laboratory of Fiber Optic Sensing Technology and Information Processing, Ministry of Education, Wuhan University of Technology, Wuhan 430070, China
Abstract
A field-programmable gate array (FPGA)-based large-capacity sensing network with ultra-weak fiber Bragg gratings (FBGs) is proposed and experimentally studied. The demodulation system is constructed to interrogate 1642 serial time-division-multiplexing FBGs with a peak reflectivity of about 40 dB and equal separations of 2.5 m. Two semiconductor optical amplifiers and an InGaAs linear sensor array controlled by an FPGA are introduced to the demodulation system to achieve fast, precise, and flexible interrogation. The low crosstalk and spectral distortion are investigated through both theoretical analysis and experiments.

Fiber Bragg grating (FBG) sensor networks[1,2] have attracted considerable interest for quasi-distributed sensing. Wavelength division multiplexing (WDM) is a popular scheme because of its intuitionistic wavelength demodulation method. However, limited by the bandwidth of broadband light sources, which are often less than 100 nm, only tens of sensors can be multiplexed in one fiber. Froggatt et al. experimentally multiplexed 800 FBG sensors in a single array using an optical frequency domain reflectometry scheme[3,4], but the maximum fiber span is limited by the coherence length of the tunable laser and polarization fading in the light interference. Time-division multiplexing (TDM), which distinguishes between FBG sensors with an identical wavelength by detecting the different time delays between reflected pulses along the fiber, has substantial potential to increase the number of the multiplexing sensors[58" target="_self" style="display: inline;">8]. Several TDM schemes with a resonant cavity have been reported[911" target="_self" style="display: inline;">–11]. Notably, the required interrogated sensors of these schemes are traditional FBGs with a reflectivity that is 20dB, where the multiplexing capacity is seriously limited by crosstalk. Although the multiplexing capacity can be improved to some extent by using a hybrid scheme, such as WDM + TDM, these technologies are limited by bandwidth and transmission loss. To obtain lower crosstalk and larger multiplexing capability, ultra-weak FBGs are a great choice. Wang et al. experimentally demonstrated 1000 ultra-weak FBGs (peak reflectivities 37dB) by a serial TDM sensor network[12]. However, this was a relatively long interval over which to obtain the result of one special FBG sensor, over 10 s, by reconstructing the reflection spectrum of each FBG during the entire scanning period in the time domain.

In this Letter, an interrogation system for a large-scale sensing network with ultra-weak FBGs was proposed and experimentally studied. We multiplexed 1642 ultra-weak FBGs with a reflectivity of about 40dB and a central wavelength of about 1550.9 nm in series, and the measurement accuracy of the Bragg wavelengths obtained by the interrogation system was less than 5 pm. The crosstalk of the sensor array was analyzed. The reflected spectrum of all 1642 FBGs along the sensor network showed a low transmission loss.

The large-capacity sensing network interrogation system with identical ultra-weak FBGs is illustrated in Fig. 1. The light from the amplified spontaneous emission source is modulated to nanosecond pulses. A pulse generator, realized by field-programmable gate array (FPGA) logic, drives the first semiconductor optical amplifier (SOA(1)) functioning as a modulator, as well as the first stage optical amplifier. Then the pulses are amplified by the second stage optical amplifier, the erbium-doped fiber amplifier, and launched into an FBG array. The reflected pulses from the FBGs return to SOA(2), which acts as a gating device as well as an amplifier. The FPGA generates a time-shifted pulse sequence to activate SOA(2) to filter and amplify one specific FBG signal while absorbing signals reflected from other FBGs. The pulses reflected by the FBGs arrive at SOA(2) with time delays of: τi=2nLic,where τi is the time delay of the pulses reflected by the FBGi, c is the speed of light in the vacuum, n is the effective refractive index of the optical fiber, and Li is the distance of FBGi from the circulator. When the time-shifted pulse sequence from the FPGA has a time shift τi, the pulse reflected by FBGi will be amplified each time when it passes through SOA(2), and the pulses reflected by the other FBGs will be blocked. By changing the time delay through the FPGA, each FBG can be addressed separately.

A CCD-based demodulator (I-MON 256, Ibson Photonics) is used in the interrogation system to obtain the spectral information of the FBGs. The interrogation system response frequency f is limited by both the response time of CCD τres and the time interval of pulse sequence τd: fmin(1τd,1τres),where τd2nLc, and L is the length of the sensing fiber. The response time of the CCD could be as fast as tens of microseconds. For a sensing fiber less than 10 km in which 1000 FBGs are serial multiplexed, it takes less than 0.1 s to obtain the reflection wavelengths of all sensors. Once SOA(2) is turned on, a trigger pulse generated by the FPGA will be sent to the CCD to activate the spectra sampling. Both the CCD detector and the SOAs are controlled by the FPGA, so that the spectra sampled by the CCD in time delay τi can respond to FBGi.

The reflected spectra of FBGi need to be reconstructed at different delay times τi through the peak-fitting algorithm because of the limited pixel number of the CCD. The average pixel spacing of the I-MON 256 in the wavelength is about 170 pm. By using the Gaussian peak-fitting algorithm, a peak wavelength resolution of 0.5 pm can be achieved. The adjusted Gaussian function is shown in f(λi)=A·exp((λiB)22C2),where A, B, and C are the adjusted parameters (amplitude, center, and deviation), and f(λi) is the calculated spectra of λi. Gaussian peak fitting is computationally intensive, so faster algorithms, such as the centroid algorithm, can be used in high-speed interrogation at the cost of higher fit noise.

In order to obtain two pulse sequences with a time-delay precision as high as 1 ps, a two-stage time-delay controller (coarse tuning and fine tuning) is implemented. Figure 2 shows the procedure. The reference pulse sequence and delayed pulse sequence are named 1# and 2#, respectively. The pulse waveform is realized by mapping it into block random-access memory (BRAM). The width of the pulse is expressed by the continuous digital “1” stored in the BRAM, and a low level of pulses corresponds to the continuous digital “0”. Then, the pulse cycle is expressed by the read/write BRAM depth. Output parallel-to-serial logic resources (OSERDESE) is a dedicated parallel-to-serial converter with specific clocking and logic resources in the FPGA. By converting the parallel data into the serial bit signal of the I/O interface by OSERDESE after reading BRAM sequentially, the coarse tuning is completed. Coarse tuning is the first-stage delay control unit with a level of accuracy up to 0.625 ns for a Xilinx Virtex7 FPGA.

Fig. 2. Modulation pulses generated by FPGA method.

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Programmable output delay near the FPGA ports allows outgoing signals to be delayed on an individual basis. This is the second-stage delay control unit, fine tuning. The tap delay resolution is varied by selecting different FPGA series and different reference clocks, generally 78 or 52 ps. In all 32 taps, the adjustable delay can reach 2.496 or 1.664 ns.

The I-MON 256 module has a 256-pixel-InGaAs detector running at a clock frequency of 5 MHz maximum. Figure 3 shows the system design scheme for spectra sampling. The detector begins the integral exposure when detecting a high level at a rising edge of the clock pulse (CLK), and ends integral exposure when detecting a low level at a falling edge of CLK. The pixels data will be output serially after 8 CLK. CCD_sp is the digital start signal for analog to digital (A/D) conversion. It is the signal that informs the start of the first ch output. CCD_trig is the sampling synchronous signal for A/D conversion. It is the signal to start the acquisition of the video signal in synchronization with the rising of CCD-Trig.

Fig. 3. FPGA timing of InGaAs detector.

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The A/D chip AD9826, with a 3-channel 16-bit operation up to 15 MSPS A/D converter, works at in the one-channel sample/hold amplifier (SHA) mode timing and converts the analog signal to 16-bit valid pixel data for the FPGA. Before the InGaAs detector starts working at the normal status, the FPGA configures AD9826 by serial clock (SCLK), serial interface load pulse (SLOAD), and serial interface data input/output (SDATA). The correlated double sampler data level sampling clock (CDSCLK2) and analog/digital converter clock (ADCCLK) output the control clock with 1 MHz and a phase difference of 90°. SCLK, SLOAD, SDATA, CDSCLK2, and ADCCLK are different pins of the FPGA chip. The string and conversion will be reached when the high and low byte data are combined. The time measurement data are received and packaged to a PC via Ethernet after the data is cumulated to 256.

The performance of the proposed interrogation system was further verified by demodulating an ultra-weak FBG array with 1642 FBGs and 2.5 m equidistance between neighboring FBGs. The ultra-weak FBG array was fabricated by draw-tower writing method[13]. The peal reflectivity of the FBGs is about 40dB, which is measured using an online measurement method[14]. All the FBGs in the array were inscribed with a same phase mask so that they have almost the same peak wavelength. The FPGA generates a pulse sequence with a 20 ns width and a 100 μs interval to drive SOA(1), which is from Inphenix Inc. By changing the time delay with a step of 1 ns through a delay timer, the reflected power along the sensing fiber is obtained by the CCD detector. Each peak of the reflected power indicates the reflected power of the corresponding FBGs. The normalized reflected power is shown in Fig. 4. The fluctuation of the peak value is caused by fabrication errors induced during the inscribing process. A total of 1642 peaks are detected, and the time delay of the reflected peaks is recorded. By adjusting the delay timer, all weak FBGs along the sensing fiber can be interrogated in a row.

Fig. 4. Reflected power of FBG sensors (reflectivity=40dB).

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Figure 5 shows the peak wavelengths of all 1642 FBG sensors measured by the interrogation system. The peak wavelengths of the most of the FBGs are distributed in the range from 1550.9 to 1551.1 nm. The CCD detector works at 1000 Hz, and it takes less than 2 s to complete one interrogation process for a 1642-FBG array over a distance of about 4.5 km.

Fig. 5. Peak wavelength of FBG sensors.

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In order to investigate the spectral distortion induced by the crosstalk, the reflective spectrum of the first and last 5 FBGs of the FBG array were measured by a spectrometer (YOKOGAWA AQ6370B), shown in Fig. 6, by setting the delay timer to 2962, 2988, 3012, 3037, 3061, 43712, 43736, 43761, 43785, and 43810 ns. The time delay of 2962 ns for FBG1 indicates there is a bare fiber of about 296 m between FBG1 and the circulator. The difference in the delay time between two adjacent FBGs is about 25 ns. The reflected power of the last 5 FBGs are 60.398, 60.637, 60.877, 60.636, and 60.862dBm, respectively, which is 3 dB less than that of the first 5 FBGs because of multiple-reflection crosstalk. There are tiny distortions in the spectrum of the last 5 FBGs that are also caused by multiple-reflection crosstalk. The distortion at the end of the sensors array will be further reduced by using FBG sensors with even lower reflectivity.

Fig. 6. Reflective spectrum of FBG sensors.

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To test the impact of the spectral distortion on measurement accuracy, the Bragg wavelength of the first and last 5 FBGs of the weak FBG array were measured 200 times in the same environment. Based on the data collected from CCD detector, the peak wavelengths were calculated by the Gaussian peak-fitting method. The measurement accuracy is less than 5 pm for all sensors in the array. Figure 7 shows the standard deviation of the first and last 5 FBGs. The wavelength measurement error (2σ) is limited in 2 pm. The impact of the spectral distortion caused by crosstalk is negligible.

Fig. 7. Measurement errors of peak wavelengths for FBG1–FBG5 and FBG1638–FBG1642.

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A novel interrogation system for a large-scale sensing network with an identical ultra-weak FBGs system based on a serial TDM scheme is proposed and experimentally demonstrated in this Letter. The proposed system, in which an FPGA is introduced to an FPGA to drive two SOAs to achieve high-speed measurement, interrogates the large-scale array at the speed of 1000 FBGs per second. The measurement accuracy of the Bragg wavelengths obtained by the interrogation system is less than 5 pm. The proposed system is confirmed by 1642 FBGs with reflectivity of about 40dB and 2.5 m equidistance between neighboring FBGs. The spectral distortion induced by multiple-reflection crosstalk is measured and analyzed. The reflective spectra of the FBGs at the end of the array show a low transmission loss, which can be further reduced by using even weaker FBGs. This means the interrogation system has the ability to demodulate an even larger number of sensors in series.

Zhi Wang, Hongqiao Wen, Chenyuan Hu, Wei Bai, Yutang Dai. Field-programmable gate array-based large-capacity sensing network with 1642 ultra-weak fiber Bragg gratings[J]. Chinese Optics Letters, 2016, 14(1): 010601.

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