多元量子逻辑比二元量子逻辑具有更多的优点, 是量子计算技术中一个重要的研究领域, 而加法器电路和减法器电路是计算机和其他复杂计算系统中各种计算单元的主要组成部分。提出了一种四元量子可逆半加器电路, 该电路由四元1-qudit门、2-qudit Feynman门和Muthukrishnan-Stroud门构成, 以及一种四元量子可逆全加器和四元量子并行加法器电路, 并将所提出设计与现有电路进行了比较, 优化了其性能。

The heterogeneous integration of photonic integrated circuits (PICs) with a diverse range of optoelectronic materials has emerged as a transformative approach, propelling photonic chips toward larger scales, superior performance, and advanced integration levels. Notably, two-dimensional (2D) materials, such as graphene, transition metal dichalcogenides (TMDCs), black phosphorus (BP), and hexagonal boron nitride (hBN), exhibit remarkable device performance and integration capabilities, offering promising potential for large-scale implementation in PICs. In this paper, we first present a comprehensive review of recent progress, systematically categorizing the integration of photonic circuits with 2D materials based on their types while also emphasizing their unique advantages. Then, we discuss the integration approaches of 2D materials with PICs. We also summarize the technical challenges in the heterogeneous integration of 2D materials in photonics and envision their immense potential for future applications in PICs.

为了提高偏振分束器的消光比，提出了一种由混合等离子体水平狭缝波导(HSW)和氮化硅混合垂直狭缝波导(VSW)组成的双槽超紧凑偏振分束器(PBS)。同时，包层材料为二氧化硅，既能防止混合等离子体氧化，又便于与其他器件集成。采用有限元方法仿真HSW和VSW的模态特性。HSW和VSW波导在特定的宽度下TE偏振模式是满足相位匹配的，而TM偏振模式相位不匹配。因此，HSW波导中的TE模式与VSW波导发生强耦合，而TM模式直接通过HSW波导。结果表明：在1.55 μm的TE模式下，PBS的消光比(ER)为35.1 dB，插入损耗(IL)为0.34 dB，在TM模式下，PBS的ER和IL分别为40.9 dB和2.65 dB。所设计的PBS有100 nm的工作带宽，具有高ER，低IL的特点，适用于光子集成电路(PICs)。

光子集成芯片将多种功能器件进行片上集成，具有损耗低、带宽大、抗电磁干扰等优势，是当前光电领域发展的主流方向。集成光学器件的温度稳定性是影响其光学性能的重要因素之一。为了提高集成光学器件温度稳定性，提出了基于氮化硅（Si₃N₄）和长程表面等离激元（Long-Range Surface Plasmon Polariton，LRSPP）波导的温度不敏感结构，对器件性能随温度的漂移进行抑制和补偿。首先，分析了Si₃N₄波导和LRSPP波导对接的模式耦合效率，当满足最佳匹配条件时，可实现耦合效率99.9%以上的高效耦合。对混合波导的温度特性进行了分析，结果表明，当LRSPP波导和Si₃N₄波导的最佳长度比为 0.077，相位不随温度的变化而发生漂移，实现了温度不敏感的波导。当波导不能满足最佳长度比时，对LRSPP波导芯层施加电压实现主动补偿，亦可实现温度不敏感。此外，对LRSPP波导的传输特性进行了测试，测得偏振消光比为64 dB，具有良好的单偏振特性。文中提出的温度不敏感结构具有可主动调谐、损耗低、单偏振、普适性高等优点，能有效地解决Si₃N₄波导性能随温度变化发生漂移的问题，在Si₃N₄基光子集成芯片中具有广泛的应用前景。

为解决将量子电路映射到二维架构并实现量子位近邻问题, 提出了一种二维架构下的量子电路布局与优化方法。首先根据量子门在量子电路中的执行顺序和相互作用, 提出基于量子位权重的深度优先搜索量子位映射次序, 再考虑到映射次序的已放入量子位、待放入量子位和未放入量子位的关系进行量子位的初始布局实现量子位的初始映射；进而对近邻过程中的相同前瞻量子代价的选择进行了优化, 再根据优化后的代价结果, 插入SWAP门, 实现所有双量子门的最近邻。最后利用实验对提出的方法进行了验证, 并与已有的方法进行了比较。结果表明所提出方法在中小规模的基准电路上平均优化率达到18%, 在中大规模的基准电路上平均优化率达到17%。

在噪声中等规模量子 (NISQ) 设备上, 量子线路可靠性受到量子噪声的影响。为了实现CNOT量子线路在量子芯片上高效可靠的执行, 以相邻量子位交互错误率为权重, 给出了计算最小Steiner噪声路径长度的代价度量方法, 提出了噪声感知的CNOT量子线路最近邻综合算法。实验结果表明, 与现有方法相比, 所提出的综合算法在保证线路可靠性的前提下, 有效地降低了综合过程中所使用CNOT门的数量, CNOT门代价的平均优化率达到27.7%, 其中200门级的CNOT量子线路优化率达到了93.79%。

Topological edge states (TESs), arising from topologically nontrivial phases, provide a powerful toolkit for the architecture design of photonic integrated circuits, since they are highly robust and strongly localized at the boundaries of topological insulators. It is highly desirable to be able to control TES transport in photonic implementations. Enhancing the coupling between the TESs in a finite-size optical lattice is capable of exchanging light energy between the boundaries of a topological lattice, hence facilitating the flexible control of TES transport. However, existing strategies have paid little attention to enhancing the coupling effects between the TESs through the finite-size effect. Here, we establish a bridge linking the interaction between the TESs in a finite-size optical lattice using the Landau–Zener model so as to provide an alternative way to modulate/control the transport of topological modes. We experimentally demonstrate an edge-to-edge topological transport with high efficiency at telecommunication wavelengths in silicon waveguide lattices. Our results may power up various potential applications for integrated topological photonics.