Vertical GaN power MOSFET is a novel technology that offers great potential for power switching applications. Being still in an early development phase, vertical GaN devices are yet to be fully optimized and require careful studies to foster their development. In this work, we report on the physical insights into device performance improvements obtained during the development of vertical GaN-on-Si trench MOSFETs (TMOS’s) provided by TCAD simulations, enhancing the dependability of the adopted process optimization approaches. Specifically, two different TMOS devices are compared in terms of transfer-curve hysteresis (H) and subthreshold slope (SS), showing a ≈ 75% H reduction along with a ≈ 30% SS decrease. Simulations allow attributing the achieved improvements to a decrease in the border and interface traps, respectively. A sensitivity analysis is also carried out, allowing to quantify the additional trap density reduction required to minimize both figures of merit.

CMOS image sensors produced by the existing CMOS manufacturing process usually have difficulty achieving complete charge transfer owing to the introduction of potential barriers or Si/SiO₂ interface state traps in the charge transfer path, which reduces the charge transfer efficiency and image quality. Until now, scholars have only considered mechanisms that limit charge transfer from the perspectives of potential barriers and spill back effect under high illumination condition. However, the existing models have thus far ignored the charge transfer limitation due to Si/SiO₂ interface state traps in the transfer gate channel, particularly under low illumination. Therefore, this paper proposes, for the first time, an analytical model for quantifying the incomplete charge transfer caused by Si/SiO₂ interface state traps in the transfer gate channel under low illumination. This model can predict the variation rules of the number of untransferred charges and charge transfer efficiency when the trap energy level follows Gaussian distribution, exponential distribution and measured distribution. The model was verified with technology computer-aided design simulations, and the results showed that the simulation results exhibit the consistency with the proposed model.

A NiO/β-Ga₂O₃ heterojunction-gate field effect transistor (HJ-FET) is fabricated and its instability mechanisms are experimentally investigated under different gate stress voltage (V_G,s) and stress times (t_s). Two different degradation mechanisms of the devices under negative bias stress (NBS) are identified. At low V_G,s for a short t_s, NiO bulk traps trapping/de-trapping electrons are responsible for decrease/recovery of the leakage current, respectively. At higher V_G,s or long t_s, the device transfer characteristic curves and threshold voltage (V_TH) are almost permanently negatively shifted. This is because the interface dipoles are almost permanently ionized and neutralize the ionized charges in the space charge region (SCR) across the heterojunction interface, resulting in a narrowing SCR. This provides an important theoretical guide to study the reliability of NiO/β-Ga₂O₃ heterojunction devices in power electronic applications.

Trap characterization on GaN Schottky barrier diodes (SBDs) has been carried out using deep-level transient spectroscopy (DLTS). Selective probing by varying the ratio of the rate window values (r) incites different trap signatures at similar temperature regimes. Electron traps are found to be within the values: 0.05–1.2 eV from the conduction band edge whereas the hole traps 1.37–2.66 eV from the valence band edge on the SBDs. In the lower temperature regime, the deeper electron traps contribute to the capacitance transients with increasing r values, whereas at the higher temperatures >300 K, a slow variation of the trap levels (both electrons and holes) is observed when r is varied. These traps are found to be mainly contributed to dislocations, interfaces, and vacancies within the structure.Trap characterization on GaN Schottky barrier diodes (SBDs) has been carried out using deep-level transient spectroscopy (DLTS). Selective probing by varying the ratio of the rate window values (r) incites different trap signatures at similar temperature regimes. Electron traps are found to be within the values: 0.05–1.2 eV from the conduction band edge whereas the hole traps 1.37–2.66 eV from the valence band edge on the SBDs. In the lower temperature regime, the deeper electron traps contribute to the capacitance transients with increasing r values, whereas at the higher temperatures >300 K, a slow variation of the trap levels (both electrons and holes) is observed when r is varied. These traps are found to be mainly contributed to dislocations, interfaces, and vacancies within the structure.

Optical line tweezers have been an efficient tool for the manipulation of large micron particles. In this paper, we propose to create line traps with transformable configurations by using the transverse electromagnetic mode-like laser source. We designed an optical path to simulate the generation of the astigmatic beams and line traps with a series of lenses to realize the rotational transformation with respect to the rotation angle of cylindrical lenses. It is shown that the spherical particles with diameters ranging from 5 μm to 20 μm could be trapped, aligned, and revolved in experiment. The periodical trapping forces generated by transformable line traps might open an alternative way to investigate the mechanical properties of soft particles and biological cells.