随着亚10 nm集成电路芯片逐步进入消费电子、互联硬件、电子医疗设备等领域，由半导体制造设备所引入的晶圆缺陷对集成电路在良率与价格方面的影响将不断显现，由此带来的对典型缺陷进行高速识别、定位与分类等制造过程控制环节，将变得越来越具有挑战性。传统的晶圆缺陷检测方法包括明场、暗场及电子束成像方法，尽管能够覆盖绝大多数缺陷检测场景，但难以在检测精度、检测灵敏度和检测速度上取得较好的平衡。纳米光子学、计算成像、定量相位成像、光学涡旋、多电子束扫描、热场成像以及深度学习等新兴技术的出现，在提升缺陷灵敏度、分辨率以及对比度等方面已初步展现出一定的潜力，这为晶圆缺陷检测提供了新的可能性。因此，本综述将从缺陷的可检测性、缺陷检测系统与原理样机、先进图像后处理算法三个方面总结晶圆缺陷检测领域的最新进展，以期对初入该领域的研究人员和跨学科工作者提供一定助益。

With the ever-increasing demand for sub-10 nm integrated circuit chips in the fields such as consumer electronics, interconnect hardware, and electronic medical equipment, the impact of wafer defects introduced by semiconductor manufacturing equipment on the yield and price of integrated circuits will continue to emerge, which makes the manufacturing process control such as the high-speed identification, localization, and classification of typical defects more challenging. Although conventional wafer defect inspection methods such as bright-field, dark-field, and electron-beam imaging can cover most defect inspection scenarios, they cannot balance inspection accuracy, sensitivity, and speed. Emerging techniques such as nanophotonics, computational imaging, quantitative phase imaging, optical vortex, multi-beam scanning electron microscopy, thermal field imaging, and deep learning have shown great potential in improving defect sensitivity, resolution, and contrast, which opens up new possibilities for wafer defect inspection. Hence, we make a comprehensive review for the progress in wafer defect inspection from three aspects: the assessment of defect detectability, the diverse inspection methods and prototypes, and the advanced post-processing algorithms. It is expected to help both researchers and interdisciplinary workers who are new entrants in the field.