Emission and capture characteristics of a deep hole trap (H1) in n-GaN Schottky barrier diodes (SBDs) have been investigated by optical deep level transient spectroscopy (ODLTS). Activation energy (E_emi) and capture cross-section (σ_p) of H1 are determined to be 0.75 eV and 4.67 × 10^?15 cm², respectively. Distribution of apparent trap concentration in space charge region is demonstrated. Temperature-enhanced emission process is revealed by decrease of emission time constant. Electric-field-boosted trap emission kinetics are analyzed by the Poole?Frenkel emission (PFE) model. In addition, H1 shows point defect capture properties and temperature-enhanced capture kinetics. Taking both hole capture and emission processes into account during laser beam incidence, H1 features a trap concentration of 2.67 × 10¹⁵ cm^?3. The method and obtained results may facilitate understanding of minority carrier trap properties in wide bandgap semiconductor material and can be applied for device reliability assessment.

In this work, a novel one-time-programmable memory unit based on a Schottky-type p-GaN diode is proposed. During the programming process, the junction switches from a high-resistance state to a low-resistance state through Schottky junction breakdown, and the state is permanently preserved. The memory unit features a current ratio of more than 10³, a read voltage window of 6 V, a programming time of less than 10^?4 s, a stability of more than 10⁸ read cycles, and a lifetime of far more than 10 years. Besides, the fabrication of the device is fully compatible with commercial Si-based GaN process platforms, which is of great significance for the realization of low-cost read-only memory in all-GaN integration.

Vertical GaN power MOSFET is a novel technology that offers great potential for power switching applications. Being still in an early development phase, vertical GaN devices are yet to be fully optimized and require careful studies to foster their development. In this work, we report on the physical insights into device performance improvements obtained during the development of vertical GaN-on-Si trench MOSFETs (TMOS’s) provided by TCAD simulations, enhancing the dependability of the adopted process optimization approaches. Specifically, two different TMOS devices are compared in terms of transfer-curve hysteresis (H) and subthreshold slope (SS), showing a ≈ 75% H reduction along with a ≈ 30% SS decrease. Simulations allow attributing the achieved improvements to a decrease in the border and interface traps, respectively. A sensitivity analysis is also carried out, allowing to quantify the additional trap density reduction required to minimize both figures of merit.

A new kind of step-flow growth mode is proposed, which adopts sidewall as step source on patterned GaN substrate. The terrace width of steps originated from the sidewall was found to change with the growth temperature and ammonia flux. The growth mechanism is explained and simulated based on step motion model. This work helps better understand the behaviors of step advancement and puts forward a method of precisely modulating atomic steps.

The InGaN films and GaN/InGaN/GaN tunnel junctions (TJs) were grown on GaN templates with plasma-assisted molecular beam epitaxy. As the In content increases, the quality of InGaN films grown on GaN templates decreases and the surface roughness of the samples increases. V-pits and trench defects were not found in the AFM images. p⁺⁺-GaN/InGaN/n⁺⁺-GaN TJs were investigated for various In content, InGaN thicknesses and doping concentration in the InGaN insert layer. The InGaN insert layer can promote good interband tunneling in GaN/InGaN/GaN TJ and significantly reduce operating voltage when doping is sufficiently high. The current density increases with increasing In content for the 3 nm InGaN insert layer, which is achieved by reducing the depletion zone width and the height of the potential barrier. At a forward current density of 500 A/cm², the measured voltage was 4.31 V and the differential resistance was measured to be 3.75 × 10^?3 Ω·cm² for the device with a 3 nm p⁺⁺-In_0.35Ga_0.65N insert layer. When the thickness of the In_0.35Ga_0.65N layer is closer to the “balanced” thickness, the TJ current density is higher. If the thickness is too high or too low, the width of the depletion zone will increase and the current density will decrease. The undoped InGaN layer has a better performance than n-type doping in the TJ. Polarization-engineered tunnel junctions can enhance the functionality and performance of electronic and optoelectronic devices.

In this letter, high power density AlGaN/GaN high electron-mobility transistors (HEMTs) on a freestanding GaN substrate are reported. An asymmetric Γ-shaped 500-nm gate with a field plate of 650 nm is introduced to improve microwave power performance. The breakdown voltage (BV) is increased to more than 200 V for the fabricated device with gate-to-source and gate-to-drain distances of 1.08 and 2.92 μm. A record continuous-wave power density of 11.2 W/mm@10 GHz is realized with a drain bias of 70 V. The maximum oscillation frequency (f_max) and unity current gain cut-off frequency (f_t) of the AlGaN/GaN HEMTs exceed 30 and 20 GHz, respectively. The results demonstrate the potential of AlGaN/GaN HEMTs on free-standing GaN substrates for microwave power applications.

The GaN HEMT is a potential candidate for RF applications due to the high frequency and large power handling capability. To ensure the quality of the communication signal, linearity is a key parameter during the system design. However, the GaN HEMT usually suffers from the nonlinearity problems induced by the nonlinear parasitic capacitance, transconductance, channel transconductance etc. Among them, the transconductance reduction is the main contributor for the nonlinearity and is mostly attributed to the scattering effect, the increasing resistance of access region, the self-heating effect and the trapping effects. Based on the mechanisms, device-level improvement methods of transconductance including the trapping suppression, the nanowire channel, the graded channel, the double channel, the transconductance compensation and the new material structures have been proposed recently. The features of each method are reviewed and compared to provide an overview perspective on the linearity of the GaN HEMT at the device level.

针对Micro-LED器件微型化带来的尺寸效应、高速巨量转移、发光器件与驱动背板的高精度键合等问题，本文通过金属有机化学气相沉积和原子层沉积技术制备了一种垂直结构的交流驱动无电学接触型GaN基Micro-LED器件，研究了其光电特性。结果表明，器件电路模型可等效为RC电路，随着交流驱动信号频率的增大，器件等效阻抗先快速减小后趋于稳定。当频率固定时，器件I-V特性呈线性关系，器件等效阻抗稳定，器件亮度随着驱动电压增大而增强。当驱动电压固定时，器件在16~22 MHz频率范围内达到最大亮度，且亮度随频率增加呈现先上升后下降趋势；此外，由于回路呈电容特性，无电学接触型Micro-LED器件存在发光延迟效应和电流超前效应。对比传统Micro-LED器件，无电学接触型Micro-LED器件与外部电极无电学接触，在交流驱动条件下实现内部载流子复合发光，有望解决Micro-LED芯片微型化带来的技术难题。

针对红外与可见光融合图像存在纹理细节不丰富、对比度较低及目标信息损失等问题，提出了一种基于特征优化和生成对抗网络的图像融合算法。首先，设计一种自适应特征优化模块以增强原始图像纹理细节及对比度；然后，为使融合图像保留更多的多模态信息，将生成对抗网络引入到融合框架中。在生成器模型中，考虑到红外与可见光图像成像机理差异，构建了双支路特征提取网络，并设计多尺度密集连接模块以提取异源图像丰富的特征信息；其次，在融合层构造通道和空间注意力模型以增强局部特征之间联系，减小融合图像中目标信息损失；最后，为使融合结果尽可能保留可见光纹理细节的同时又能够较好突出红外目标，构造了双判别器网络结构。为验证所提算法优势，在TNO数据集上进行实验，并与6种经典融合算法进行主观和客观比较。实验结果表明，所提算法无论在主观还是客观评价上均具有明显优势，生成的融合图像纹理细节更为丰富、边缘及目标更加清晰且具有更好的对比度，客观评价指标信息熵、空间频率、相关熵、视觉保真度和梯度信息分别提高了16.11%、65.46%、7.96%、42.67%和33.24%。