基于0.6 μm高低压兼容CMOS工艺,设计并实现了一种四通道高压抗辐射电压输出型数模转换器(DAC)。采用R-2R梯形网络和高压折叠共源共栅运放作为缓冲输出,保证了DAC良好的单调性,提高了抗辐射能力。该DAC芯片尺寸为5.80 mm×3.70 mm。测试结果表明,在正负电源电压分别为±5 V时,DAC的输出范围达到-2.5~2.5 V,功耗为26.95 mW,DNL为0.41 LSB,INL为0.34 LSB,输出建立时间为6.5 μs,INL匹配度为0.11 LSB。

A quad high voltage radiation hardened voltage output 12-bit DAC was designed and implemented in a 0.6 μm standard CMOS process with high and low voltage devices. The R-2R ladder network and high-voltage multistage folding-cascode operational amplifier which operated as a buffer output was proposed. This structure realized the good monotonicity of DAC and improved its radiation resistance. The chip size was 5.80 mm×3.70 mm. The test results showed that the output range of the DAC was -2.5~2.5 V, the power consumption was 26.95 mW, the DNL was 0.41 LSB, the INL was 0.34 LSB, the settling time was 6.5 μs, and the INL compatibility was 0.11 LSB at ±5 V power supply.