为了解决串行收发机在强信道衰减下误码过高的问题, 采用Duo-binary PAM4编码技术设计了一款低功耗的112 Gibit/s SerDes发射机。通过采用Duo-binary PAM4编码技术, 解决了高速PAM4(Pulse Amplitude Modulation-4)信号衰减过大的问题; 采用CMOS的1/4速架构的4∶1合路器, 降低了发射机的系统功耗; 采用阻抗校准电路, 提高了Duo-binary PAM4 发射机的线性度。该发射机采用CMOS 28 nm工艺设计, 0.9 V电压供电。仿真结果表明: 该发射机在20.9 dB强信道衰减下, 可以工作在112 Gibit/s, 功耗为1.9 pJ/bit, 且线性度达到88.3%。

In order to solve the problem of high bit-error-rate of serial transceiver under strong channel attenuation,a low-power 112 Gibit/s SerDes transmitter is designed by using Duo-binary PAM4 coding technology.By adopting Duo-binary PAM4 coding technology,the problem of excessive attenuation of high-speed PAM4 (Pulse Amplitude Modulation-4) signal is solved.The system power consumption of the transmitter is reduced by using CMOS 1/4 speed architecture for 4∶1 MUX.The linearity of Duo-binary PAM4 transmitter is improved by using impedance calibration circuit.The transmitter is designed by CMOS 28 nm process and powered by 0.9 V voltage.The simulation results show that the transmitter can operate at 112 Gibit/s under the strong channel attenuation of 20.9 dB,with the power consumption of 1.9 pJ/bit and the linearity of 88.3%.