微电子学, 2022, 52 (1): 104, 网络出版: 2022-06-14  

一种低触发电压的两级防护SCR器件

A Two-Stage-Protection SCR Device with Low Trigger Voltage
作者单位
1 郑州大学 集成电路可靠性设计与静电防护实验室, 郑州 450000
2 西安理工大学 自动化与信息工程学院, 西安 710000
3 长鑫存储技术有限公司, 合肥 230000
摘要
提出了一种用于降低触发电压的两级防护SCR(TSPSCR)。在传统LVTSCR中植入P-ESD层, 增设额外的二极管。因为P-ESD层的掺杂浓度较高, 该器件能更早发生雪崩击穿而触发第一级泄流路径, 从而开启第二级泄流路径。Sentaurus TCAD仿真结果表明, 该器件的触发电压从传统器件的10.59 V降低至4.12 V, 维持电压为1.25 V, 1 V直流电压下漏电流仅为7.85 nA。优化后的TSPSCR适用于先进1 V工作电压的电路中。
Abstract
A two-stage protection SCR (TSPSCR) was proposed to reduce the trigger voltage. The P-ESD layer was implanted in the traditional LVTSCR, and an additional diode was added. Because of the higher doping concentration of P-ESD layer, the device could trigger the first-stage discharge path by avalanche breakdown earlier, thus opening the second-stage discharge path. The Sentaurus TCAD simulation results showed that compared with conventional SCRs, the device had a lower trigger voltage from 10.59 V to 4.12 V, a maintenance voltage of 1.25 V, and a leakage current of 7.85 nA at 1 V DC voltage. The optimized TSPSCR could be used in advanced circuits with 1 V operating voltage.
参考文献

[1] LAI D W, SQUE S, PETERS W, et al. Gate-lifted nMOS ESD protection device triggered by a p-n-p in series with a diode [J]. IEEE Trans Elec Dev, 2019, 66(4): 1642-1647.

[2] DU F B, HOU F, SONG W Q, et al. An improved silicon-controlled-rectifier (SCR) for low-voltage ESD application [J]. IEEE Trans Elec Dev, 2020, 67(2): 576-581.

[3] LIN C Y, FU W H. Diode string with reduced clamping voltage for efficient on-chip ESD protection [J]. IEEE Trans Dev Mater Reliab, 2016, 16(4): 688-690.

[4] SUN K M, LI T, MENG L Y. A modified CLTdSCR with low leakage and low capacitance for ESD protection [J]. IEEE Trans Elect Dev, 2021, 68(2): 934-937.

[5] DU F B, DONG X Y, YANG C J, et al. A robust dual directional SCR without current saturation effect for ESD applications [C] // IEEE 26th Int Symp Phys & Failure Analys Integr Circ. Hangzhou, China. 2019: 1-4.

[6] CHEN J T, KER M D. ESD protection design with diode-triggered quad-SCR for separated power domains [J]. IEEE Trans Dev & Mater Reliab, 2019, 19(2): 283-289.

[7] CHEN L, DU F B, CHEN R B, et al. Novel diode-triggered SCR with suppressed multiple triggering for ESD applications[C] // IEEE Int Conf EDSSC. Shenzhen, China. 2018: 1-2.

[8] LIANG H L, BI X W, GU X F, et al. Investigation on LDMOS-SCR with high holding current for high voltage ESD protection [J]. Microelec Reliab, 2016, 61(3): 120-124.

[9] ZHANG L Z, WANG Y, HE Y D. A novel technique to suppress multiple-triggering effect in typical DTSCRs under ESD stress [J]. IEICE Trans Elec, 2020, E103.C(5): 274-278.

[10] DU F B, HOU F, SONG W Q, et al. An enhanced MLSCR structure suitable for ESD protection in advanced epitaxial CMOS technology [J]. IEEE Trans Elec Dev, 2019, 66(5): 2062-2067.

[11] HUANG X Z, LIU Z W, LIU F, et al. High holding voltage SCRs with segmented layout for high-robust ESD protection [J]. Elec Lett, 2017, 53(18): 1274-1275.

[12] NEAMEN D A. 半导体物理与器件 [M]. 赵毅强, 姚素英, 史再峰, 译. 第4版. 北京: 电子工业出版社, 2018: 186-188.

[13] DU F B, SONG W Q, HOU F, et al. Augmented DTSCR with fast turn-on speed for nanoscale ESD protection applications [J]. IEEE Trans Elec Dev, 2020, 67(3): 1353-1356.

[14] 王加鑫, 李晓静, 赵发展, 等. 用于ESD防护的PDSOI NMOS器件高温特性 [J]. 半导体技术, 2021, 46(3): 210-215.

张英韬, 朱治华, 范晓梅, 毛盼, 宋彬, 许杞安, 吴铁将, 陈睿科, 王耀, 刘俊杰. 一种低触发电压的两级防护SCR器件[J]. 微电子学, 2022, 52(1): 104. ZHANG Yingtao, ZHU Zhihua, FAN Xiaomei, MAO Pan, SONG Bin, XU Qi’an, WU Tiejiang, CHEN Ruike, WANG Yao, LIOU Juin Jei. A Two-Stage-Protection SCR Device with Low Trigger Voltage[J]. Microelectronics, 2022, 52(1): 104.

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