微电子学, 2022, 52 (1): 17, 网络出版: 2022-06-14
低功耗非对称性可调STDP突触电路设计
Design of a Low Power Asymmetrically Tunable STDP Synapse Circuit
摘要
基于65 nm CMOS工艺设计了一种可用于脉冲神经网络系统的低功耗、高能效、结构紧凑的突触电路。突触电路采用开关电容电路结构, 直接接收来自神经元电路的脉冲信号, 根据脉冲时间依赖可塑性(STDP)学习规则调节突触权重, 并实现了权重学习窗口的非对称性调节, 使突触电路可以适应不同情况。仿真结果表明, 突触电路耗能约为0.4 pJ/spike。
Abstract
A synapse circuit with low power consumption, high energy efficiency and compact structure was designed in a 65 nm CMOS technology. It could be used in Spike Neuron Network (SNN) system. A switched capacitor circuit structure was used in the synapse circuit to receive directly the pulse signal from the neuron circuit. The weight of synapse could be adjusted by Spike Timing Dependent Plasticity (STDP) learning rule, and the tunable asymmetric of the weight learning window was realized, so that the synaptic circuit could adapt to different applications. The simulation results showed that the synaptic circuit consumed around 0.4 pJ/spike.
王巍, 张珊, 赵汝法, 张定冬, 熊德宇, 袁军. 低功耗非对称性可调STDP突触电路设计[J]. 微电子学, 2022, 52(1): 17. WANG Wei, ZHANG Shan, CHIO U-Fat, ZHANG Dingdong, XIONG Deyu, YUAN Jun. Design of a Low Power Asymmetrically Tunable STDP Synapse Circuit[J]. Microelectronics, 2022, 52(1): 17.